Ayoub Sadeghi

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 15

Top Topics

Integrated Circuit

Top Venues

Microelectron. J.

Circuits Syst. Signal Process.

IEEE Embed. Syst. Lett.

Comput. Electr. Eng.

Publications

Mahmood Rafiee, Nabiollah Shiri, Mohsen Gharehkhani, Alexandra Pinto Castellanos, Ayoub Sadeghi
Characterizing parameter variations for enhanced performance and adaptability in 3 nm MBCFET technology. Microelectron. J. 151 (2024)
Ayoub Sadeghi, Razieh Ghasemi, Hossein Ghasemian, Nabiollah Shiri
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures. IEEE Embed. Syst. Lett. 15 (1) (2023)
Ayoub Sadeghi, Razieh Ghasemi, Hossein Ghasemian, Nabiollah Shiri
Efficient and optimized approximate GDI full adders based on dynamic threshold CNTFETs for specific least significant bits. Frontiers Inf. Technol. Electron. Eng. 24 (4) (2023)
Nabiollah Shiri, Ayoub Sadeghi, Mahmood Rafiee
High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures. Comput. Electr. Eng. 109 (Part A) (2023)
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Abdolreza Darabi, Ebrahim Abiri
Voltage over-scaling CNT-based 8-bit multiplier by high-efficient GDI-based counters. IET Comput. Digit. Tech. 17 (1) (2023)
Nabiollah Shiri, Ayoub Sadeghi, Mahmood Rafiee, Maryam Bigonah
SR-GDI CNTFET-based magnitude comparator for new generation of programmable integrated circuits. Int. J. Circuit Theory Appl. 50 (5) (2022)
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Rahim Ghayour
Tolerant and low power subtractor with 4: 2 compressor and a new TG-PTL-float full adder cell. IET Circuits Devices Syst. 16 (6) (2022)
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Mahsa Tahghigh
An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending. Frontiers Inf. Technol. Electron. Eng. 23 (6) (2022)
Mahmood Rafiee, Nabiollah Shiri, Ayoub Sadeghi
High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures. IEEE Embed. Syst. Lett. 14 (1) (2022)
Mahmood Rafiee, Nabiollah Shiri, Ayoub Sadeghi, Abdolreza Darabi, Ebrahim Abiri
Low-Power and Fast-Swing-Restoration GDI-Based Magnitude Comparator for Digital Images Processing. Circuits Syst. Signal Process. 41 (9) (2022)
Mahmood Rafiee, Farshad Pesaran, Ayoub Sadeghi, Nabiollah Shiri
An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications. Microelectron. J. 118 (2021)
Ebrahim Abiri, Abdolreza Darabi, Mohammad Reza Salehi, Ayoub Sadeghi
Optimized Gate Diffusion Input Method-Based Reversible Magnitude Arithmetic Unit Using Non-dominated Sorting Genetic Algorithm II. Circuits Syst. Signal Process. 39 (9) (2020)
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Parisa Rahimi
A low-power pseudo-dynamic full adder cell for image addition. Comput. Electr. Eng. 87 (2020)
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee
High-Efficient, Ultra-Low-Power and High-Speed 4: 2 Compressor with a New Full Adder Cell for Bioelectronics Applications. Circuits Syst. Signal Process. 39 (12) (2020)
Ebrahim Abiri, Abdolreza Darabi, Ayoub Sadeghi
Gate-diffusion input (GDI) method for designing energy-efficient circuits in analogue voltage-mode fuzzy and QCA systems. Microelectron. J. 87 (2019)