Atsushi Muramatsu

Publication Activity (10 Years)

Years Active: 1989-2017
Publications (10 Years): 1

Top Topics

Maintenance Cost

Top Venues

IEICE Trans. Electron.

Publications

Hiroyuki Nakamoto, Hong Gao, Atsushi Muramatsu
A Thin, Compact and Maintenance-Free Beacon Transmitter Operating from a 44-lux Photovoltaic Film Harvester. IEICE Trans. Electron. (6) (2017)
Tadashi Yasufuku, Koji Hirairi, Yu Pu, Yun Fei Zheng, Ryo Takahashi, Masato Sasaki, Hiroshi Fuketa, Atsushi Muramatsu, Masahiro Nomura, Hirofumi Shinohara, Makoto Takamiya, Takayasu Sakurai
limited ultra low voltage logic circuits. ISQED (2012)
Yu Pu, Xin Zhang, Katsuyuki Ikeuchi, Atsushi Muramatsu, Atsushi Kawasumi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai
Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits. IEEE Trans. Circuits Syst. II Express Briefs (5) (2011)
Atsushi Muramatsu, Tadashi Yasufuku, Masahiro Nomura, Makoto Takamiya, Hirofumi Shinohara, Takayasu Sakurai
12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 voltage domains. ESSCIRC (2011)
Yu Pu, Xin Zhang, Jim Huang, Atsushi Muramatsu, Masahiro Nomura, Koji Hirairi, Hidehiro Takata, Taro Sakurabayashi, Shinji Miyano, Makoto Takamiya, Takayasu Sakurai
Misleading energy and performance claims in sub/near threshold digital systems. ICCAD (2010)
Atsushi Muramatsu, Masanori Hashimoto, Hidetoshi Onodera
Effects of On-Chip Inductance on Power Distribution Grid. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)
Atsushi Muramatsu, Masanori Hashimoto, Hidetoshi Onodera
Effects of on-chip inductance on power distribution grid. ISPD (2005)
Yoshifumi Sekine, Masatoshi Suyama, Atsushi Muramatsu
Spatial feature detection using a pulse-type hardware neuron model. Systems and Computers in Japan 20 (11) (1989)