Arash Beldachi

Publication Activity (10 Years)

Years Active: 2012-2018
Publications (10 Years): 4

Top Topics

Hardware Implementation

Conceptual Design

Routing Algorithm

Wireless Multimedia Sensor Networks

Top Venues

IET Comput. Digit. Tech.

Publications

Koteswararao Kondepu, Chris Jackson, Yanni Ou, Arash Beldachi, Albert Pagès, Fernando Agraz, Francesca Moscatelli, Wang Miao, Valerija Kamchevska, Nicola Calabretta, Giada Landi, Salvatore Spadaro, Shuangyi Yan, Dimitra Simeonidou, Reza Nejabati
Fully SDN-Enabled All-Optical Architecture for Data Center Virtualization with Time and Space Multiplexing. JOCN 10 (7) (2018)
Koteswararao Kondepu, Jim Zou, Arash Beldachi, Hung Kai Chen, Christopher Chase, Michael Huang, Emilio Hugues-Salas, Joan A. Garcia-Espin, Anna Tzanakaki, Reza Nejabati, Michael Eiselt, Dimitra Simeonidou
Performance Evaluation of Next-Generation Elastic Backhaul with Flexible VCSEL-based WDM Fronthaul. ECOC (2017)
Chris Jackson, Koteswararao Kondepu, Yanni Ou, Arash Beldachi, Albert Pagès Cruz, Fernando Agraz, Francesca Moscatelli, Wang Miao, Valerija Kamchevska, Nicola Calabretta, Giada Landi, Salvatore Spadaro, Reza Nejabati, Dimitra Simeonidou
COSIGN: A Complete SDN Enabled All-Optical Architecture for Data Centre Virtualisation with Time and Space Multiplexing. ECOC (2017)
José Luis Núñez-Yáñez, Mohammad Hosseinabady, Arash Beldachi
Energy Optimization in Commercial FPGAs with Voltage, Frequency and Logic Scaling. IEEE Trans. Computers 65 (5) (2016)
José L. Núñez-Yáñez, Arash Beldachi
Run-time power and performance scaling with CPU-FPGA hybrids. AHS (2014)
Arash Beldachi, José L. Núñez-Yáñez
Run-time power and performance scaling in 28 nm FPGAs. IET Comput. Digit. Tech. 8 (4) (2014)
Arash Beldachi, Simon J. Hollis, José L. Núñez-Yáñez
eXtended Torus routing algorithm for networks-on-chip: a routing algorithm for dynamically reconfigurable networks-on-chip. IET Comput. Digit. Tech. 8 (3) (2014)
José L. Núñez-Yáñez, Arash Beldachi, Atukem Nabina, Mohammad Hosseinabady
Exploring dynamically reconfigurable multicore designs with NoRC designer. HPCS (2012)