Andleeb Zahra

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 14

Top Topics

Digital Circuits

Regression Model

Top Venues

Publications

Bhartipudi Sahishnavi, Arnab Dey, Anubhab Banerjee, Andleeb Zahra, Zia Abbas
A 275 pW, 0.5 V supply insensitive gate-leakage based current/voltage reference circuit for a wide temperature range of -55 to 100 °C without using amplifiers and resistors. Microelectron. J. 150 (2024)
Bhartipudi Sahishnavi, Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Andleeb Zahra, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas
An inductor-less, cost-effective On-chip CMOS VNA for bio-molecule detection. ISCAS (2024)
Deepthi Amuru, Andleeb Zahra, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Zia Abbas
AI/ML algorithms and applications in VLSI design and technology. Integr. 93 (2023)
Ashutosh Pathy, Andleeb Zahra, Amir Ahmad, Zia Abbas
A High PSRR CMOS Voltage and Current Reference in One Circuit Without Amplifier for Low Power Applications. ICM (2023)
Andleeb Zahra, Giampiero de Cesare, Domenico Caputo, Nicola Lovecchio, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas
Design and Fabrication of Microfluidic Chip for Temperature Control Applications in Biomedical. ICST (2023)
Deepthi Amuru, Andleeb Zahra, Varnika Karakuram, Zia Abbas
Design of Approximate Full Adders for Error Resilient Applications. ICCA (2023)
Swarnim Sinha, Andleeb Zahra, Imran Siddiqui, Pawan Kumar, Alimpan Modak, Prabhakar Bhimalapuram, Tapan Sau, Syed Azeemuddin, Zia Abbas
A Label-Free Low-Cost Radio Frequency Driven Noninvasive Lab-on-Chip System for Creatinine Detection. ICST (2023)
Mohammed Salman Ahmed, Md. Kalesha, Andleeb Zahra, Zia Abbas
Approximate Toom-Cook FFT with sparsity aware error tuning in a shared memory architecture. Integr. 89 (2023)
Deepthi Amuru, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Andleeb Zahra, Zia Abbas
AI/ML Algorithms and Applications in VLSI Design and Technology. CoRR (2022)
Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas
PVT and Aging Degradation Invariant Automated Optimization Approach for CMOS Low-Power High-Performance VLSI Circuits. ISQED (2021)
Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas
Algorithm Driven Power-Timing Optimization Methodology for CMOS Digital Circuits Considering PVTA Variations. ISCAS (2021)
Deepthi Amuru, Andleeb Zahra, Zia Abbas
Statistical Variation Aware Leakage and Total Power Estimation of 16 nm VLSI Digital Circuits Based on Regression Models. VDAT (2019)
Shirisha Gourishetty, Harshini Mandadapu, Andleeb Zahra, Zia Abbas
A Highly Accurate Machine Learning Approach to Modelling PVT Variation Aware Leakage Power in FinFET Digital Circuits. APCCAS (2019)
Zia Abbas, Andleeb Zahra, Mauro Olivieri
LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits. VDAT (2018)