LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits.
Zia AbbasAndleeb ZahraMauro OlivieriPublished in: VDAT (2018)
Keyphrases
- cmos technology
- high speed
- analog vlsi
- delay insensitive
- circuit design
- vlsi circuits
- low power
- power consumption
- focal plane
- low cost
- parallel processing
- power dissipation
- real time
- chip design
- nm technology
- estimation algorithm
- floating gate
- cmos image sensor
- software aging
- tunnel diode
- mixed signal
- image sensor
- estimation accuracy
- robust estimation
- infrared
- parameter estimation
- neural network