Anas A. Hamoui

Publication Activity (10 Years)

Years Active: 1999-2014
Publications (10 Years): 0

Top Topics

Vlsi Architecture

Power Reduction

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Mostafa A. N. Haroun, Anas A. Hamoui
Design and Verification of a Switchable Opamp for Switched-Capacitor Integrators. IEEE Trans. Circuits Syst. II Express Briefs (10) (2014)
Mohamed A. Shaheen, Anas A. Hamoui, Yvon Savaria
A current-output DAC for low-power low-noise log-domain ΔΣ modulators. NEWCAS (2014)
Mostafa A. N. Haroun, Anas A. Hamoui
A current-mirror opamp with switchable transconductances for low-power switched-capacitor integrators. ISCAS (2013)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
A Reconfigurable and Power-Scalable 10-12 Bit 0.4-44 MS/s Pipelined ADC With 0.35-0.5 pJ/Step in 1.2 V 90 nm Digital CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2013)
Philip M. Chopp, Anas A. Hamoui
A 1-V 13-mW Single-Path Frequency-Translating ΔΣ Modulator With 55-dB SNDR and 4-MHz Bandwidth at 225 MHz. IEEE J. Solid State Circuits 48 (2) (2013)
Mostafa A. N. Haroun, Anas A. Hamoui
On the settling of nondelaying cascaded switched-capacitor integrators. MWSCAS (2013)
Mohammad K. Al-Ghamdi, Anas A. Hamoui
A Spurious-Free Switching Buck Converter Achieving Enhanced Light-Load Efficiency by Using a ΔΣ-Modulator Controller With a Scalable Sampling Frequency. IEEE J. Solid State Circuits 47 (4) (2012)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
Correction to "A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain and Settling Behavior in 65-nm Digital CMOS" [Mar 11 660-668]. IEEE J. Solid State Circuits 47 (6) (2012)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain and Settling Behavior in 65-nm Digital CMOS. IEEE J. Solid State Circuits 46 (3) (2011)
Philip M. Chopp, Anas A. Hamoui
A 1V 13mW frequency-translating ΔΣ ADC with 55dB SNDR for a 4MHz band at 225MHz. CICC (2011)
Anas A. Hamoui, H.-J. Yoo
Guest Editorial - Selected Papers From the 2010 IEEE International Solid-State Circuits Conference (ISSCC). IEEE Trans. Biomed. Circuits Syst. 4 (6) (2010)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
A reconfigurable 10-12b 0.4-44MS/s pipelined ADC with 0.35-0.5pJ/step in 1.2V 90nm digital CMOS. ESSCIRC (2010)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
Area and Power Optimization of High-Order Gain Calibration in Digitally-Enhanced Pipelined ADCs. IEEE Trans. Very Large Scale Integr. Syst. 18 (4) (2010)
Philip M. Chopp, Anas A. Hamoui
Analysis of Clock-Jitter Effects in Continuous-Time Delta Sigma Modulators Using Discrete-Time Models. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2009)
Philip M. Chopp, Anas A. Hamoui
Design Constraints for Image-Reject Frequency-Translating Delta Sigma Modulators. IEEE Trans. Circuits Syst. II Express Briefs (12) (2009)
Furrookh Ali, Anas A. Hamoui
Continuous-time DeltaSigma modulators with noise-transfer-function enhancement. ISCAS (2008)
Pavel Peev, Bart De Vuyst, Pieter Rombouts, Anas A. Hamoui
An anti-aliasing filter inspired by continuous-time ΔΣ modulation. ICECS (2008)
Anas A. Hamoui, Mohammad Sukhon, Franco Maloberti
Digitally-enhanced 2nd-order DeltaSigma modulator with unity-gain signal transfer function. ISCAS (2008)
Jorge Varona, Margarita Tecpoyotl-Torres, Anas A. Hamoui
Polysilicon vertical actuator powered with waste heat. CICC (2008)
Anas A. Hamoui, Mohammad Sukhon, Franco Maloberti
Digitally-enhanced high-order ΔΣ modulators. ICECS (2008)
Philip M. Chopp, Anas A. Hamoui
Discrete-Time Modeling of Clock Jitter in Continuous-Time Delta Sigma Modulators. ISCAS (2007)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
Power Optimization of Pipelined ADCs with High-Order Digital Gain Calibration. ICECS (2007)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
Digital Background Calibration of Capacitor-Mismatch Errors in Pipelined ADCs. IEEE Trans. Circuits Syst. II Express Briefs (9) (2006)
Anas A. Hamoui, Franco Maloberti
Delta-Sigma Modulators for Power-Efficient A/D Conversion in High-Speed Wireless Communications. ICECS (2006)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
Digital background calibration of interstage-gain and capacitor-mismatch errors in pipelined ADCs. ISCAS (2006)
Anas A. Hamoui, T. Alhajj, Mohammad Taherzadeh-Sani
Behavioral modeling of Opamp gain and dynamic effectsfor power optimization of Delta-Sigma modulators and pipelined ADCs. ISLPED (2006)
Mohammad Taherzadeh-Sani, Anas A. Hamoui
Analysis of dynamic element matching (DEM) in pipelined ADCs. ISCAS (2006)
Anas A. Hamoui, Kenneth W. Martin
High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applications. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2004)
Anas A. Hamoui, Kenneth W. Martin
A 1.8-V 3-MS/s 13-bit ΔΣ A/D converter with pseudo data-weighted-averaging in 0.18-μm digital CMOS. CICC (2003)
Jorge Varona, Anas A. Hamoui, Kenneth W. Martin
A low-voltage fully-monolithic ΔΣ-based class-D audio amplifier. ESSCIRC (2003)
Anas A. Hamoui, Kenneth W. Martin
Linearity enhancement of multibit Delta-Sigma modulators using pseudo data-weighted averaging. ISCAS (3) (2002)
Anas A. Hamoui, Nicholas C. Rumin
An analytical current, delay, and power model for the submicron CMOS inverter. ICECS (1999)