Akihiro Chiyonobu

Publication Activity (10 Years)

Years Active: 2004-2008
Publications (10 Years): 0

Publications

Shingo Watanabe, Akihiro Chiyonobu, Toshinori Sato
A Low-Power Instruction Issue Queue for Microprocessors. IEICE Trans. Electron. (4) (2008)
Yuji Kunitake, Akihiro Chiyonobu, Koichiro Tanaka, Toshinori Sato
Challenges in Evaluations for a Typical-Case Design Methodology. ISQED (2007)
Shingo Watanabe, Akihiro Chiyonobu, Toshinori Sato
Indirect Tag Search Mechanism for Instruction Window Energy Reduction. CIT (2007)
Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu
Realizing Energy-Efficient MultiCore Processors by Utilizing Speculative Thread-Level Parallelism. Int. J. Comput. Their Appl. 14 (2) (2007)
Akihiro Chiyonobu, Toshinori Sato
Energy-efficient instruction scheduling utilizing cache miss information. SIGARCH Comput. Archit. News 34 (1) (2006)
Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu
Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors. PATMOS (2006)
Toshinori Sato, Akihiro Chiyonobu
Evaluating the Impact of Fault Recovery on Superscalar Processor Performance. PRDC (2006)
Seiichiri Fujii, Akihito Sakanaka, Akihiro Chiyonobu, Toshinori Sato
A leakage-energy-reduction technique for cache memories in embedded processors. J. Embed. Comput. 2 (1) (2006)
Toshinori Sato, Akihiro Chiyonobu
An Energy-Efficient Clustered Superscalar Processor. IEICE Trans. Electron. (4) (2005)
Akihiro Chiyonobu, Toshinori Sato
Investigating heterogeneous combination of functional units for a criticality-based low-power processor architecture. ISICT (2004)