A Low-Power Instruction Issue Queue for Microprocessors.
Shingo WatanabeAkihiro ChiyonobuToshinori SatoPublished in: IEICE Trans. Electron. (2008)
Keyphrases
- low power
- single chip
- power consumption
- low cost
- high speed
- instruction set
- high power
- logic circuits
- wireless transmission
- vlsi circuits
- cmos technology
- steady state
- vlsi architecture
- level parallelism
- computer architecture
- image sensor
- low power consumption
- delay insensitive
- digital signal processing
- queue length
- image processing
- mixed signal
- computing power
- error correction
- digital camera
- gate array