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A leakage-energy-reduction technique for cache memories in embedded processors.
Seiichiri Fujii
Akihito Sakanaka
Akihiro Chiyonobu
Toshinori Sato
Published in:
J. Embed. Comput. (2006)
Keyphrases
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embedded processors
single chip
parallel implementation
hardware and software
energy consumption
low power
response time
multimedia
low cost
markov random field
associative memory