Adriana C. Sanabria-Borbon

Publication Activity (10 Years)

Years Active: 2013-2022
Publications (10 Years): 12

Top Topics

Partially Blind Signature Scheme

Analog Circuits

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IACR Cryptol. ePrint Arch.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran
Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. IEEE Trans. Emerg. Top. Comput. 10 (1) (2022)
Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio
Synthesis of High-Order Continuously Tunable Low-Pass Active-R Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (5) (2021)
Adriana C. Sanabria-Borbon, Nithyashankari Gummidipoondi Jayasankaran, Jiang Hu, Jeyavijayan Rajendran, Edgar Sánchez-Sinencio
Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges. IEEE Trans. Circuits Syst. II Express Briefs 68 (1) (2021)
Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran
Breaking Analog Locking Techniques. IEEE Trans. Very Large Scale Integr. Syst. 28 (10) (2020)
Adriana C. Sanabria-Borbon, Nithyashankari Gummidipoondi Jayasankaran, S. Y. Lee, Edgar Sánchez-Sinencio, J. Hu, Jeyavijayan (JV) Rajendran
Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits. ITC (2020)
Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran
Breaking Analog Locking Techniques via Satisfiability Modulo Theories. ITC (2019)
Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran
Towards provably-secure analog and mixed-signal locking against overproduction. ICCAD (2018)
Sergio Soto Aguilar, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio
Surrogate-based Optimization-aided Design for Low Power Analog Circuits. MWSCAS (2018)
Sanghoon Lee, Congyin Shi, Jiafan Wang, Adriana C. Sanabria-Borbon, Hatem Osman, Jiang Hu, Edgar Sánchez-Sinencio
A Built-In Self-Test and In Situ Analog Circuit Optimization Platform. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2018)
Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran
Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. IACR Cryptol. ePrint Arch. 2018 (2018)
Jiafan Wang, Congyin Shi, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu
Thwarting analog IC piracy via combinational locking. ITC (2017)
Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio
Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives. LASCAS (2017)
Adriana C. Sanabria-Borbon, Esteban Tlelo-Cuautle
Symbolic sensitivity analysis in the sizing of analog integrated circuits. CCE (2013)