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Aaron C.-W. Liang
ORCID
Publication Activity (10 Years)
Years Active: 2019-2023
Publications (10 Years): 8
Top Topics
Circuit Design
Mumford Shah Functional
Critical Path
Functional Analysis
Top Venues
ITC
ITC-Asia
VLSI-DAT
DATE
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Publications
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Sam M.-H. Hsiao
,
Amy H.-Y. Tsai
,
Lowry P.-T. Wang
,
Aaron C.-W. Liang
,
Charles H.-P. Wen
,
Herming Chiueh
Preventing Single-Event Double-Node Upsets by Engineering Change Order in Latch Designs.
ITC
(2023)
Sam M.-H. Hsiao
,
Lowry P.-T. Wang
,
Aaron C.-W. Liang
,
Charles H.-P. Wen
Existence of Single-Event Double-Node Upsets (SEDU) in Radiation-Hardened Latches for Sub-65nm CMOS Technologies.
ITC
(2022)
Aaron C.-W. Liang
,
Charles H.-P. Wen
,
Hsuan-Ming Huang
A General and Automatic Cell Layout Generation Framework With Implicit Learning on Design Rules.
IEEE Trans. Very Large Scale Integr. Syst.
30 (9) (2022)
Jiun-Cheng Tsai
,
Aaron C.-W. Liang
,
Charles H.-P. Wen
Timing-Critical Path Analysis in Circuit Designs Considering Aging with Signal Probability.
ITC-Asia
(2022)
Zong-Hua Tsai
,
Aaron C.-W. Liang
,
Charles H.-P. Wen
SlewFTA: Functional Timing Analysis Considering Slew Propagation.
VLSI-DAT
(2022)
Aaron C.-W. Liang
,
Hsuan-Ming Huang
,
Charles H.-P. Wen
Generating Layouts of Standard Cells by Implicit Learning on Design Rules for Advanced Processes.
DATE
(2021)
Denny C.-Y. Wu
,
Aaron C.-W. Liang
,
Charles H.-P. Wen
Speeding Up Functional Timing Analysis by Concise Formulation of Timed Characteristic Functions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
39 (12) (2020)
Cheng-Hsien Shen
,
Aaron C.-W. Liang
,
Charles C.-H. Hsu
,
Charles H.-P. Wen
FAE: Autoencoder-Based Failure Binning of RTL Designs for Verification and Debugging.
ITC
(2019)