Login / Signup
Soft-Error Susceptibility in Flip-Flop in EUV 7 nm Bulk-FinFET Technology.
Taiki Uemura
Byungjin Chung
Jeongmin Jo
Mijoung Kim
Dalhee Lee
Gunrae Kim
Seungbae Lee
Taesjoong Song
Hwasung Rhee
Brandon Lee
Jaehee Choi
Published in:
IRPS (2021)
Keyphrases
</>
cmos technology
case study
power consumption
real time
power dissipation
flip flops
computer systems
error rate
nm technology