On chip interconnects for multiprocessor turbo decoding architectures.
Maurizio MartinaGuido MaseraHazem MoussaAmer BaghdadiPublished in: Microprocess. Microsystems (2011)
Keyphrases
- power dissipation
- cmos technology
- turbo codes
- low cost
- high speed
- level parallelism
- highly parallel
- decision feedback
- soft decision
- high density
- digital signal processors
- input output
- multithreading
- low power
- analog vlsi
- single chip
- database machines
- decoding process
- physical design
- power consumption
- functional units
- parallel architectures
- vlsi implementation
- programmable logic
- distributed memory
- decoding algorithm
- error correction
- scheduling algorithm
- single processor
- response time