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Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI.
Hiromitsu Kimura
Takahiro Hanyu
Michitaka Kameyama
Yoshikazu Fujimori
Takashi Nakamura
Hidemi Takasu
Published in:
IEEE J. Solid State Circuits (2004)
Keyphrases
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low power
logic circuits
power dissipation
high speed
power consumption
delay insensitive
low cost
chip design
single chip
vlsi circuits
gate array
vlsi architecture
high power
digital signal processing
signal processing
asynchronous circuits
mixed signal
digital circuits
transmission line
signal processor