Login / Signup
An All-Digital On-Chip Peak-to-Peak Jitter Measurement Circuit With Automatic Resolution Calibration for High PVT-Variation Resilience.
Pei-Yuan Chou
Jinn-Shyan Wang
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2019)
Keyphrases
</>
circuit design
power reduction
high speed
power consumption
analog vlsi
phase locked loop
camera calibration
chip design
fully automatic
high density
fault tolerance
data acquisition
sigma delta
real time
packet loss
cmos technology
evolvable hardware
mixed signal
semi automatic