Power-delay characteristics of CMOS adders.

Chetana Nagendra Robert Michael Owens Mary Jane Irwin

Published in: IEEE Trans. Very Large Scale Integr. Syst. (1994)

Keyphrases

power dissipation
power consumption
low power
cmos technology
low cost
analog vlsi
vlsi circuits
high speed
digital signal processing
power management
chip design
data sets
neural network
genetic algorithm