Automatic circuit generation for sequential logic debug.

Helder H. Avelar Paulo F. Butzen Renato P. Ribas

Published in: ICECS (2015)

Keyphrases

digital circuits
delay insensitive
logic synthesis
semi automatic
shift register
data driven
fully automatic
sequential data
modal logic
micron cmos
logic circuits
database
logic programming
high speed
genetic algorithm
logical framework
electronic circuits
case study
information systems