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An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology.
Tetsuro Matsuno
Daisuke Fujimoto
Daisuke Kosaka
Naoyuki Hamanishi
Ken Tanabe
Masazumi Shiochi
Makoto Nagata
Published in:
IEICE Trans. Electron. (2010)
Keyphrases
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cmos technology
power consumption
mixed signal
low power
power dissipation
silicon on insulator
spl times
low voltage
parallel processing
power management
cmos image sensor
signal to noise ratio
digital signal processing
high speed
low cost
real time
image sensor
machine vision
missing data
metal oxide semiconductor