SEU tolerant SRAM for FPGA applications.
Sudipta SarkarAnubhav AdakVirendra SinghKewal K. SalujaMasahiro FujitaPublished in: FPT (2010)
Keyphrases
- power reduction
- power consumption
- field programmable gate array
- low power
- high speed
- low power consumption
- hardware implementation
- data transmission
- real time image processing
- fpga implementation
- low cost
- hardware architectures
- real time
- random access memory
- hardware design
- single chip
- software implementation
- gate array
- verilog hdl
- data acquisition
- digital signal
- hardware architecture
- dedicated hardware
- information systems
- computational power
- signal processing
- parallel hardware
- xilinx virtex
- wireless sensor networks
- fpga technology
- fpga hardware
- neural network