CMOS system-on-a-chip voltage scaling beyond 50nm.
Azeez J. BhavnagarwalaBlanca AustinAshok KapoorJames D. MeindlPublished in: ACM Great Lakes Symposium on VLSI (2000)
Keyphrases
- cmos technology
- low voltage
- nm technology
- silicon on insulator
- low power
- power consumption
- metal oxide semiconductor
- analog vlsi
- random access memory
- mixed signal
- power dissipation
- parallel processing
- power supply
- image sensor
- low cost
- circuit design
- ibm power processor
- high speed
- power system
- electric field
- digital signal processing
- transmission line
- integrated circuit
- high voltage
- chip design
- digital camera
- power losses