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Reduction of the Weight-Decay Rate of Volatile Memory Synapses in an Analog Hardware Neural Network for Accurate and Scalable On-Chip Learning.
Janak Sharda
Nilabjo Dey
Ankesh Jain
Debanjan Bhowmik
Published in:
ICONS (2020)
Keyphrases
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neural network
real time
learning algorithm
circuit design
artificial neural networks
associative memory
neural nets
digital circuits
fault diagnosis
memory requirements
recurrent neural networks
incremental learning
hardware and software
single chip
analog vlsi