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Ankesh Jain
ORCID
Publication Activity (10 Years)
Years Active: 2011-2024
Publications (10 Years): 21
Top Topics
Finite Impulse Response
Computerized Tomography
Delta Sigma
High Speed
Top Venues
ISCAS
IEEE Trans. Circuits Syst. I Regul. Pap.
IEEE J. Solid State Circuits
IEEE Trans. Circuits Syst. II Express Briefs
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Publications
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Shivani
,
Ankesh Jain
Analysis and Design of High-Speed, Linear and Fullscale Input Swing Voltage to Time Converters.
PRIME
(2024)
Pratibha Verma
,
Sourav Naval
,
Dhiman Mallick
,
Ankesh Jain
Hybrid Piezoelectric-Triboelectric Biomechanical Harvesting System for Wearable Applications.
IEEE Trans. Circuits Syst. II Express Briefs
71 (4) (2024)
Aditya Shahane
,
Saripilli Swapna Manjiri
,
Ankesh Jain
,
Sandeep Kumar
Graph of Circuits with GNN for Exploring the Optimal Design Space.
NeurIPS
(2023)
Sayan Banerjee
,
Ankesh Jain
Modified Gm-Free Assisted Opamp Technique in Continuous Time Delta Sigma Modulators.
APCCAS
(2023)
Ankesh Jain
High speed Continuous-time Delta Sigma Modulators for Wide-band Applications: A review paper.
ISOCC
(2021)
Jatin Sharma
,
Pratibha Verma
,
Dhiman Mallick
,
Ankesh Jain
Electrical Energy Injection using Hybrid SECE for High Performance Nonlinear Mechanical Energy Harvesting.
MWSCAS
(2021)
Liang Qi
,
Ankesh Jain
,
Dongyang Jiang
,
Sai-Weng Sin
,
Rui Paulo Martins
,
Maurits Ortmanns
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance.
IEEE J. Solid State Circuits
55 (2) (2020)
Mounika Kundurthi
,
Dhiman Mallick
,
Ankesh Jain
System Level Modeling and Optimization of Hybrid Vibration Energy Harvesters.
ISCAS
(2020)
Janak Sharda
,
Nilabjo Dey
,
Ankesh Jain
,
Debanjan Bhowmik
Reduction of the Weight-Decay Rate of Volatile Memory Synapses in an Analog Hardware Neural Network for Accurate and Scalable On-Chip Learning.
ICONS
(2020)
Ankesh Jain
,
Ahmed Abdelaal
,
Maurits Ortmanns
Effective Filtering of Requantization Error in Dual Quantized CTDSM using FIR DAC.
ISCAS
(2019)
Liang Qi
,
Ankesh Jain
,
Dongyang Jiang
,
Sai-Weng Sin
,
Rui Paulo Martins
,
Maurits Ortmanns
A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS.
ISSCC
(2019)
Yanquan Luo
,
Ankesh Jain
,
Johannes Wagner
,
Maurits Ortmanns
Input Referred Comparator Noise in SAR ADCs.
IEEE Trans. Circuits Syst. II Express Briefs
(5) (2019)
Mahdi Rajabzadeh
,
Matthias Häberle
,
Ankesh Jain
,
Maurits Ortmanns
An Integrated Readout for Current Sensing based on a Σ∆ Modulator with Switched Capacitor Feedback.
ESSCIRC
(2019)
Jiazuo Chi
,
Ankesh Jain
,
Jens Sauerbrey
,
Joachim Becker
,
Maurits Ortmanns
Interferer Induced Jitter Reduction in Bandpass CT ΣΔ Modulators for Receiver Applications.
ISCAS
(2018)
Yanquan Luo
,
Liang Qi
,
Ankesh Jain
,
Maurits Ortmanns
A High-Resolution Delta-Sigma D/A Converter Architecture with High Tolerance to DAC Mismatch.
ISCAS
(2018)
Ankesh Jain
,
Maurits Ortmanns
Gain Mismatch Insensitive Time-Interleaved DAC for CT Delta Sigma Modulator by application of a Three-State DAC.
ISCAS
(2018)
Ankesh Jain
,
Shanthi Pavan
Continuous-Time Delta-Sigma Modulators With Time-Interleaved FIR Feedback.
IEEE Trans. Circuits Syst. I Regul. Pap.
(2) (2018)
Lishan Lv
,
Ankesh Jain
,
Xiong Zhou
,
Joachim Becker
,
Qiang Li
,
Maurits Ortmanns
-C Proportional-Integrator-Based Continuous-Time ΔΣ Modulator With 50-kHz BW and 74.4-dB SNDR.
IEEE J. Solid State Circuits
53 (11) (2018)
Tripti Jain
,
Klaus Schneider
,
Ankesh Jain
An Efficient Self-Routing and Non-Blocking Interconnection Network on Chip.
NoCArc@MICRO
(2017)
Tripti Jain
,
Klaus Schneider
,
Ankesh Jain
Deriving concentrators from binary sorters using half cleaners.
ReConFig
(2017)
Ankesh Jain
,
Shanthi Pavan
A 13.3 mW 60 MHz bandwidth, 76 dB DR 6 GS/s CTΔΣM with time interleaved FIR feedback.
VLSI Circuits
(2016)
Ankesh Jain
,
Shanthi Pavan
Characterization Techniques for High Speed Oversampled Data Converters.
IEEE Trans. Circuits Syst. I Regul. Pap.
(5) (2014)
Ankesh Jain
,
Shanthi Pavan
Improved characterization of high speed continuous-time ΔΣ modulators using a duobinary test interface.
ISCAS
(2013)
Ankesh Jain
,
Muthusubramaniam Venkatesan
,
Shanthi Pavan
Analysis and Design of a High Speed Continuous-time ΔΣ Modulator Using the Assisted Opamp Technique.
IEEE J. Solid State Circuits
47 (7) (2012)
Ankesh Jain
,
Muthusubramanian Venkateswaran
,
Shanthi Pavan
A 4mW 1 GS/s continuous-time ΔΣ modulator with 15.6MHz bandwidth and 67 dB dynamic range.
ESSCIRC
(2011)