A Tightly Coupled Heterogeneous Core with Highly Efficient Low-Power Mode.
Yasumasa ChidaiKojiro IzuokaRyota ShioyaMasahiro GoshimaHideki AndoPublished in: ARCS (2018)
Keyphrases
- highly efficient
- low power
- tightly coupled
- low cost
- loosely coupled
- power consumption
- high speed
- fine grained
- high power
- single chip
- general purpose
- web services
- digital signal processing
- vlsi architecture
- wireless transmission
- power reduction
- low power consumption
- gate array
- embedded systems
- mixed signal
- real time
- logic circuits
- evolutionary algorithm
- distributed systems
- multithreading
- video sequences
- lightweight
- vlsi circuits
- signal processor
- sat solvers