Measurement of Low-Energy Processor Chip Using Fine-Grain Variable Stages Pipeline Architecture.
Tomoyuki NakabayashiTakahiro SasakiKazuhiko OhnoToshio KondoPublished in: ICNC (2012)
Keyphrases
- low energy
- fine grain
- pipeline architecture
- coarse grain
- distributed memory
- multithreading
- high speed
- coarse grained
- hardware implementation
- electron microscopy
- parallel computation
- fine grained
- shared memory
- parallel processing
- reconfigurable hardware
- low cost
- protein folding
- parallel implementation
- parallel computing
- nested transactions
- real time
- data acquisition
- general purpose
- bitstream