A CMOS GSM IF-sampling circuit with reduced in-channel aliasing.
Salvatore LevantinoCarlo SamoriMihai BanuJack P. F. GlasVito BoccuzziPublished in: IEEE J. Solid State Circuits (2003)
Keyphrases
- circuit design
- high speed
- analog vlsi
- sampling theorem
- delay insensitive
- low pass filtering
- vlsi circuits
- multi channel
- low voltage
- cmos technology
- mixed signal
- multiple input
- power dissipation
- random sampling
- communication channels
- power consumption
- frequency domain
- end to end
- analog circuits
- super resolution
- high resolution
- mobile communication
- low power
- high frequency
- nm technology
- digital circuits
- low pass filter
- reconstruction error
- low cost
- wavelet transform