Design for Test of Asynchronous NULL Convention Logic (NCL) Circuits.
Waleed K. Al-AssadiSindhu KakarlaPublished in: ITC (2008)
Keyphrases
- built in self test
- high level synthesis
- asynchronous circuits
- logic synthesis
- digital circuits
- logic circuits
- delay insensitive
- integrated circuit
- shift register
- chip design
- engineering design
- test cases
- circuit design
- neural network
- case study
- software testing
- micron cmos
- computer aided
- design process
- building blocks
- logic programs
- user interface
- knowledge base
- artificial intelligence