Low power and high performance sram design using bank-based selective forward body bias.
Kalyana C. BollapalliRajesh GargKanupriya GulatiSunil P. KhatriPublished in: ACM Great Lakes Symposium on VLSI (2009)
Keyphrases
- low power
- low power consumption
- power consumption
- single chip
- high speed
- low cost
- cmos technology
- vlsi architecture
- logic circuits
- digital signal processing
- power reduction
- power dissipation
- wireless transmission
- gate array
- signal processor
- high power
- design process
- nm technology
- mixed signal
- vlsi circuits
- cmos image sensor
- power management
- power saving
- low complexity
- low voltage