Applying genetic algorithms to optimize the power in tiled SNUCA chip multicore architectures.
Aparna Mandke DaniBharadwaj AmruturY. N. SrikantPublished in: SAC (2011)
Keyphrases
- genetic algorithm
- ibm power processor
- power consumption
- simulated annealing
- neural network
- level parallelism
- artificial neural networks
- circuit design
- low power
- evolutionary algorithm
- functional verification
- evolutionary computation
- high speed
- single chip
- multithreading
- chip design
- multi objective
- operating system
- optimization method
- genetic programming
- shared memory
- high density
- power distribution
- computational intelligence
- fuzzy logic