A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique.
Carlos Briseno-VidriosAlexander EdwardAyman ShafikSamuel PalermoJosé Silva-MartínezPublished in: VLSIC (2015)
Keyphrases
- low power
- high speed
- cmos technology
- high power
- nm technology
- low cost
- power consumption
- single chip
- wireless transmission
- digital signal processing
- vlsi circuits
- deblocking filter
- low voltage
- real time
- image sensor
- frame rate
- ultra low power
- vlsi architecture
- logic circuits
- power dissipation
- low power consumption
- cmos image sensor
- delay insensitive
- power reduction