Design of a CMOS test chip for package models and I/O characteristics verification.
Chetan DespandeTom ChenPublished in: ASP-DAC (2003)
Keyphrases
- circuit design
- functional verification
- single chip
- high speed
- chip design
- low cost
- power dissipation
- analog to digital converter
- power consumption
- case study
- cmos image sensor
- data structure
- design tools
- low power
- user interface
- formal methods
- digital circuits
- vlsi implementation
- asynchronous circuits
- metamodel
- model checking
- input output
- ibm power processor