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Design of CMOS logic gates with enhanced robustness against aging degradation.
Paulo F. Butzen
Vinícius Dal Bem
André Inácio Reis
Renato P. Ribas
Published in:
Microelectron. Reliab. (2012)
Keyphrases
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logic circuits
low power
circuit design
high speed
chip design
power consumption
single chip
building blocks
digital circuits
neural network
case study
low cost
infrared
design methodology