SRAM-Based PUF with Noise Immunity Achieving 0.58% Native BER in 55-nm CMOS.
Zexin SuBo LiChang LiuXiaohui SuQian LuoHongyu RenZhengsheng HanPublished in: ISCAS (2024)
Keyphrases
- noise immunity
- cmos technology
- power consumption
- low power
- nm technology
- random access memory
- silicon on insulator
- low voltage
- high speed
- bit error rate
- low cost
- leakage current
- metal oxide semiconductor
- dynamic random access memory
- image sensor
- power dissipation
- design considerations
- retrieval accuracy
- rotation invariance
- distance measure
- co occurrence
- multiscale
- information retrieval systems
- pattern recognition