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A minimum total power methodology for projecting limits on CMOS GSI.

Azeez J. BhavnagarwalaBlanca AustinKeith A. BowmanJames D. Meindl
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2000)
Keyphrases
  • power consumption
  • low power
  • power management
  • low cost
  • data sets
  • case study
  • multiscale
  • high speed
  • design methodology
  • power supply
  • delay insensitive