Accelerating the evolution of a systolic array-based evolvable hardware system.
Javier MoraEduardo de la TorrePublished in: Microprocess. Microsystems (2018)
Keyphrases
- evolvable hardware
- systolic array
- data flow
- reconfigurable architecture
- evolutionary computation
- digital circuits
- evolutionary algorithm
- image filters
- lossless image compression
- bio inspired
- parallel architecture
- fault tolerant
- parallel processing
- genetic programming
- multi objective
- genetic algorithm ga
- recommender systems
- e learning
- hardware implementation
- data mining
- signal processing
- computer vision