On-chip Communication Buffer Architecture Optimization Considering Bus Width.
Salita SombatsiriKeishi SakanushiYoshinori TakeuchiMasaharu ImaiPublished in: MCSoC (2012)
Keyphrases
- high speed
- multithreading
- analog vlsi
- optimization algorithm
- low cost
- optimization problems
- memory access
- vlsi implementation
- software architecture
- communication networks
- communication protocol
- network architecture
- communication systems
- data acquisition
- high density
- high bandwidth
- evolutionary algorithm
- agent communication
- reconfigurable hardware
- level parallelism
- management system