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A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power.
Alessio Santiccioli
Mario Mercandelli
Andrea L. Lacaita
Carlo Samori
Salvatore Levantino
Published in:
CICC (2019)
Keyphrases
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power consumption
wind turbine
single phase
data conversion
power reduction
low power
power supply
wide range
power management
power electronics
high speed
feature selection
control algorithm
active power
packet loss
range data
fuzzy sets
power generation
control system
clock frequency