A 2× load/store pipe for a low-power 1-GHz embedded processor.
Zongjian ChenDaniel MurraySteve NishimotoMark H. PearceMax OykerDaniel RodriguezRobert RogenmoserDongwook (Drew) SuhErik SupnetVincent von KaenelGeorge YiuPublished in: IEEE J. Solid State Circuits (2003)
Keyphrases
- low power
- high speed
- power consumption
- clock frequency
- single chip
- power reduction
- low cost
- intel xeon
- gate array
- cmos technology
- embedded systems
- high power
- wireless transmission
- load balancing
- vlsi circuits
- digital signal processing
- low power consumption
- power saving
- power management
- image sensor
- low voltage
- hardware and software
- logic circuits
- mixed signal
- real time
- vlsi architecture
- signal processor