Login / Signup

A 3D-Stacked SRAM using Inductive Coupling with Low-Voltage Transmitter and 12: 1 SerDes.

Kota ShibaTatsuo OmoriKodai UeyoshiKota AndoKazutoshi HiroseShinya Takamaeda-YamazakiMasato MotomuraMototsugu HamadaTadahiro Kuroda
Published in: ISCAS (2020)
Keyphrases
  • low voltage
  • random access memory
  • leakage current
  • design considerations
  • power line
  • cmos technology
  • power management
  • computer vision
  • power consumption