Latency and Latch Count Minimization in Wave Steered Circuits.
Amit SinghArindam MukherjeeMalgorzata Marek-SadowskaPublished in: DAC (2001)
Keyphrases
- power reduction
- power consumption
- low power
- flip flops
- high speed
- power dissipation
- response time
- vlsi circuits
- high density
- low latency
- delay insensitive
- logic synthesis
- objective function
- logic circuits
- analog circuits
- quantum computing
- circuit design
- minimization problems
- prefetching
- low cost
- wave equation
- wave propagation
- data transfer
- cloud computing
- lateral inhibition
- tunnel diode