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Ultralow-Voltage Retention SRAM With a Power Gating Cell Architecture Using Header and Footer Power-Switches.

Hayato YoshidaYusaku ShiotsuDaiki KitagataShuu'ichirou YamamotoSatoshi Sugahara
Published in: IEEE Open J. Circuits Syst. (2021)
Keyphrases
  • power consumption
  • power management
  • long term
  • data transmission
  • multithreading
  • electrical power
  • power losses
  • real time
  • duty cycle