PVT variations aware low leakage INDEP approach for nanoscale CMOS circuits.

Vijay Kumar Sharma Manisha Pattanaik Balwinder Raj

Published in: Microelectron. Reliab. (2014)

Keyphrases

analog vlsi
delay insensitive
high speed
circuit design
vlsi circuits
focal plane
cmos technology
power dissipation
data sets
real time
high levels
low power
floating gate
infrared
information systems
neural network
atomic force microscopy