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A new low-power high-speed single-clock-cycle binary comparator.
Fabio Frustaci
Stefania Perri
Marco Lanuzza
Pasquale Corsonello
Published in:
ISCAS (2010)
Keyphrases
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low power
high speed
power consumption
high power
single chip
low cost
wireless transmission
real time
low power consumption
logic circuits
vlsi circuits
frame rate
energy dissipation
vlsi architecture
non binary
constraint satisfaction problems
signal processing