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A 40nm 1.0Mb 6T pipeline SRAM with digital-based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS tracking and Adaptive Voltage Detector for boosting control.

Wei-Nan LiaoNan-Chun LienChi-Shin ChangLi-Wei ChuHao-I YangChing-Te ChuangShyh-Jye JouWei HwangMing-Hsien TuHuan-Shun HuangJian-Hao WangPaul-Sen KanYong-Jyun Hu
Published in: SoCC (2013)
Keyphrases
  • data sets
  • real time
  • data collection
  • data structure
  • data analysis
  • data sources
  • data points
  • data acquisition
  • mean shift
  • line segments
  • low voltage