Parametric yield optimization of CMOS analogue circuits by quadratic statistical circuit performance models.
Tat-Kwan YuSung-Mo KangJerome SacksWilliam J. WelchPublished in: Int. J. Circuit Theory Appl. (1991)
Keyphrases
- high speed
- circuit design
- analog vlsi
- delay insensitive
- vlsi circuits
- parametric models
- statistical models
- computational complexity
- statistical methods
- electronic circuits
- power consumption
- low power
- optimization process
- complex systems
- statistical analysis
- goodness of fit
- digital circuits
- probabilistic model
- pairwise
- real time