Interconnect-Aware Coherence Protocols for Chip Multiprocessors.
Liqun ChengNaveen MuralimanoharKarthik RamaniRajeev BalasubramonianJohn B. CarterPublished in: ISCA (2006)
Keyphrases
- high speed
- multithreading
- power dissipation
- shared memory multiprocessors
- low cost
- analog vlsi
- distributed memory
- low power
- single chip
- parallel architecture
- shared memory
- vlsi implementation
- clock frequency
- power consumption
- real time
- communication protocol
- cryptographic protocols
- chip design
- high density
- physical design
- key distribution
- communication protocols