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A 12 Gb/s chip-to-chip AC coupled transceiver.

Yu-Shun WangMin-Han HsiehYi-Chi WuChia-Ming LiuHsien-Chen ChiuBing-Feng LinCharlie Chung-Ping Chen
Published in: ISCAS (2011)
Keyphrases
  • high speed
  • low cost
  • analog vlsi
  • high density
  • phase locked loop
  • physical design
  • vlsi implementation
  • programmable logic
  • solid models
  • image processing
  • evolutionary algorithm
  • circuit design