A low-power, high-accuracy with fully on-chip ternary weight hardware architecture for Deep Spiking Neural Networks.
Duy-Anh NguyenXuan-Tu TranKhanh N. DangFrancesca IacopiPublished in: Microprocess. Microsystems (2022)
Keyphrases
- low power
- hardware architecture
- spiking neural networks
- high speed
- low cost
- single chip
- mixed signal
- low power consumption
- cmos technology
- hardware implementation
- power consumption
- biologically inspired
- signal processor
- spiking neurons
- power dissipation
- image sensor
- ultra low power
- field programmable gate array
- nm technology
- learning rules
- digital signal processing
- biologically plausible
- feed forward
- real time
- cmos image sensor
- associative memory
- artificial neural networks
- motor control
- signal processing
- logic circuits
- embedded systems
- power reduction
- neural network
- multi channel
- high density