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Low Cost Concurrent Error Masking Using Approximate Logic Circuits.
Mihir R. Choudhury
Kartik Mohanram
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
Keyphrases
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logic circuits
low cost
low power
functional decomposition
tunnel diode
power consumption
gate array
embedded systems
real time
error rate
high speed
error minimization
neural network
human visual system
image quality
signal processing
case study
computer vision