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Concurrent Error Detection in Sequential Circuits Implemented Using Embedded Memory of LUT-Based FPGAs.
Andrzej Krasniewski
Published in:
DFT (2004)
Keyphrases
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error detection
error correction
error recovery
embedded systems
data cleansing
high speed
error correcting
fault isolation
main memory
memory requirements
fault tolerance
fault detection
smart camera
digital circuits
random access
neural network
low cost
expert systems