Dynamic scan clock control for test time reduction maintaining peak power limit.
Priyadharshini ShanmugasundaramVishwani D. AgrawalPublished in: VTS (2011)
Keyphrases
- power consumption
- power reduction
- optimal control
- duty cycle
- control system
- data structure
- high speed
- dynamic response
- control problems
- process control
- clock gating
- learning algorithm
- control theory
- dynamically changing
- adaptive control
- control method
- statistically significant
- mathematical model
- dynamic environments
- website
- knowledge base